1. Field of the Invention
The present invention relates to a method for forming an element isolation insulating film of semiconductor devices in a trench by thermal oxidation. More particularly, the present invention is concerned with greatly improving the yield and productivity of semiconductor devices by reducing lattice defects and thus, junction leakage current.
2. Description of the Prior Art
From the perspective of the high integration of the semiconductor device, it is very important to reduce the dimension of each element and the width and area of the isolation region existing between one element and another indeed, the size of the cell is dependent on such reduction, at which point element isolation techniques are considered as critical techniques that determine the size of the memory cell.
Conventionally, various methods have been used to form element isolation insulating films, including the local oxidation of silicon (LOCOS) technique which is of insulator isolation, the poly buferred LOCOS (PBL) technique which is of the structure in which an oxide film, a polysilicon film and a nitride film are in laminated in sequence on a substrate, and the trench technique by which an insulator is buried in a trench formed in a semiconductor substrate.
As semiconductor devices are highly integrated, troublesome problems including bird's beak, planarization and punchthrough come to arise. To solve such problems, an element isolation insulating film has been formed in a trench created by dry-etching a semiconductor substrate at a certain thickness. However, lattice defectiveness occurs upon etching of the semiconductor substrate. In addition, such lattice defectiveness is enlarged when creating the element isolation insulating film, giving rise to an increase of junction leakage current and thereby lowering the production yield and productivity of semiconductor devices.